1. Field of the Invention
The invention relates to production of circuit structures and somewhat more particularly to a method of producing structures from double layers composed of metal silicide/polysilicon (sometimes referred to as polycide) on silicon substrates containing integrated semiconductor circuits, which can be provided with an insulating layer between the polycide and the silicon substrate, and are produced by reactive ion etching in a plate reactor with a gas mixture containing a halogen and with the use of a photosensitive resist mask.
2. Prior Art
Metal silicides are gaining increasing significance in the production of large scale integrated MOS-circuits. One of the applications for metal silicide is its use as a low-resistant interconnect and gate material in a polysilicon gate process. With the proviso that polysilicon is not generally replaced by the silicide but, instead, augmented; namely in such a manner that the silicide is applied over a doped polysilicon layer. However, the production of fine structures from such double layers is a complex etching problem because a series of marginal conditions must be taken into consideration when producing integrated circuits.
The invention resolves this complex etching problem.
The marginal conditions which must be observed in an etching process when producing an integrated circuit will be discussed in greater detail on the basis of the illustration shown in FIG. 1. As shown, a silicon substrate 1 is provided with a SiO.sub.2 layer 2, a n.sup.+ -doped polysilicon layer 3, a silicide layer 4, a photosensitive resist layer 5 functioning as an etching mask, as well as with a polysilicon-1 gate structure 6 and an insulating oxide layer 7 positioned thereon.
Identical reference numerals are utilized throughout this discussion to designate identical parts in all of the figures.
The vertical arrows shown in FIG. 1 respectively point out an etching problem which is resolved in accordance with the principles of the invention.
Thus, arrow 10 indicates the desired, high selectivity to SiO.sub.2 (layer 2) or some other equivalent insulator material. The layer thickness ratio of the polycide double layer (layers 3 and 4) to SiO.sub.2 is up to 50:1.
Arrow 11 shows the attainment of a suitable edge shape or profile in etched structures. This can occur by anisotropic etching with vertical edges, as shown, or by slanted etching.
Arrow 12 indicates the step problem in a double polysilicon gate process, with the danger of electrical shorts due to etching residue at the polysilicon-1 edges (gate 6 and oxide 7).
Arrow 13 illustrates the formation of a contact polycide (layers 3 and 4) to a substrate (1), a so-called buried contact.
In addition to these conditions, which are met by the invention, the invention also allows use of a photosensitive resist mask which is not attacked during the etching process so as to be useful as an etching mask. Moreover, with the invention, a high uniformity of etching exists in all areas which is of importance because of the so-called short channel effect.
It is known from the prior art to etch structures of polysilicides, whereby molybdenum and tungsten silicides are etched in nearly all instances. There is only one known brief reference regarding etching tantalum silicide structures, which, in comparison to molybdenum and tungsten silicides, has considerable advantages because of better stability at high temperatures and good adhesion characteristics to polysilicon. J. Vac. Sci. Technol., Vol. 17, No. 4, (1980) pages 787-788 indicates that titanium, tantalum, molybdenum and tungsten silicides can be etched in a plasma with a carbon tetrafluoride/oxygen reactive gas mixture. The etching processes partially occur in a tunnel reactor and partially in a parallel-plate reactor with anodic coupling ("plasma etching"), (also see J. Vac. Sci. Technol., Vol. 18, No. 4, 1981, page 346). In principle, these layers can also be etched wet, but only with the loss of dimension, conventional with wet etching.
A number of techniques for plasma etching of polysilicon can be derived from Published European patent application No. 0 015 403 whereby gas mixtures consisting of sulfur hexafluoride (SF.sub.6), chlorine (Cl.sub.2) and an inert gas are utilized. However, with these methods, only silicon is selectively etched so that a very good selectivity in the presence of SiO.sub.2 and silicon nitride is achieved. In addition, because of the reactive ion etching (the substrates to be etched are placed on an HF-conducting electrode of an operational reactor), a direct etching is also carried out so that the generated depressions have vertical side walls and the etching mask does not project beyond the edges of the so-etched depressions.
A method of the type initially described has been set forth in my U.S. Pat. No. 4,360,414, assigned to the instant assignee. With this method, sulfur hexafluoride is utilized as the reactive etching gas and the etching process is executed in two steps, each using different energy levels and having different etching rates.